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Micron Expands Long-Term Memory Deals with 7 Auto Clients; Qualcomm, Harman Draw Attention

　　Micron is expanding its Strategic Customer Agreements (SCAs) with a fresh batch of automotive partners as it moves to secure more long-term demand visibility. The company, in a press release, announced long-term supply deals with seven automotive customers, with Qualcomm and Samsung subsidiary Harman drawing particular attention, according to Reuters and South Korean media outlet Green Economy News.　　Micron has signed SCAs with key Tier 1 partners, including Qualcomm, Visteon, HARMAN, JOYNEXT, DENSO, Astemo and Hyundai Mobis. The memory chips, as noted by Reuters, are deployed across data centers, consumer electronics and vehicles, powering AI-driven functions ranging from advanced driver assistance systems (ADAS) to digital cockpits.　　Notably, Qualcomm, best known for its smartphone chips, is indeed making inroads into automotive: the sector was the standout performer in its 2Q26 earnings, delivering the strongest growth across all categories at +38% YoY, reaching 10% of total QCT revenue. According to The Elec, its Snapdragon Digital Chassis combines chips and software to support connected vehicles, digital cockpits and autonomous driving, including Snapdragon Cockpit, Snapdragon Auto Connectivity and Snapdragon Ride for ADAS.　　Beyond Qualcomm, Samsung subsidiary Harman has also drawn attention. Green Economy News notes that Harman has operated independently since Samsung’s 2017 acquisition, with CEO Christian Sobottka saying partnerships with key technology providers such as Micron will support the development of increasingly intelligent vehicle platforms.　　The latest automotive SCAs build on Micron’s existing relationships with major automakers, following previous long-term supply agreements with companies such as General Motors and Ford.　　Micron’s SCA Expansion　　Unlike traditional annual long-term agreements (LTAs), SCAs typically lock in both pricing and supply volumes for three to five years. According to Investing.com, Micron has signed 16 SCAs covering roughly 20% of its DRAM output and about one-third of its NAND volumes over the contract period. Meanwhile, CEO Sanjay Mehrotra, cited by CNBC, also noted that these strategic customer agreements are expected to account for roughly half — or potentially more — of Micron’s total revenue once fully implemented.　　The growing adoption of long-term memory agreements is also beginning to reshape pricing dynamics. Citing analysts, Munhwa Ilbo reports that spot prices are expected to remain firm amid tight supply, while contract prices under LTAs may rise more gradually. However, analysts noted that this reflects suppliers’ strategy to sustain high profitability over the long term, rather than weakening pricing power.　　The trend aligns with TrendForce’s latest memory pricing survey, which points out that several U.S.-based CSPs have entered into multi-year long-term agreements (LTAs), which restrict suppliers from raising prices for these clients. Consequently, TrendForce predicts that server DRAM contract prices will rise by 13–18% quarter-over-quarter in 3Q26.　　According to TrendForce, the primary source of server DRAM price increases will shift toward customers without LTAs, as well as incremental supply sold outside LTAs to existing LTA customers.

Key word：

Micron

Release time：2026-07-20 10:53 reading：193 Continue reading>>

ASML Raises 2026 Guidance for Second <span style='color:red'>Ti</span>me This Year; Taiwan Sales Share Climbs to 30%

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ASML Raises 2026 Guidance for Second Time This Year; Taiwan Sales Share Climbs to 30%

　　Ahead of TSMC’s earnings call tomorrow, Dutch lithography giant ASML has reinforced optimism over the AI-driven semiconductor upcycle by raising its 2026 outlook for the second time this year, as highlighted by CNBC.　　The company now expects annual sales of €43 billion ($49 billion) to €45 billion, with gross margins of 54% to 56%, according to its press release. Reuters adds that this would represent a 16% increase at the midpoint compared with ASML’s previous guidance of €36 billion to €40 billion.　　For the quarter ended June 30, ASML reported revenue of €9.33 billion ($10.90 billion), exceeding analysts’ consensus estimate of €8.80 billion, Reuters notes, adding that its net income also came in ahead of expectations at €2.92 billion, versus the €2.62 billion forecast compiled by LSEG.　　Taiwan’s Growing Role in ASML’s Sales Mix　　The strong results were underpinned by robust AI-related demand and accelerating investments in advanced-node capacity. During the earnings call, ASML CEO Christophe Fouquet said customers are rapidly expanding capacity for 5nm, 4nm and 3nm technologies while pushing the 2nm ramp as aggressively as possible, according to an earnings call transcript from Yahoo! Finance.　　As customers speed up capacity expansion and begin planning for the 1.4nm era as well, ASML expects its advanced logic foundry business to deliver around 25% revenue growth this year, Fouquet noted.　　The trend was also reflected in ASML’s second-quarter regional sales mix. Taiwan accounted for 30% of revenue during the quarter, up from 23% in 1Q26, according to the company’s earnings presentation, suggesting continued investment by TSMC as it expands capacity.　　South Korea nevertheless remained ASML’s largest market, contributing 43% of second-quarter sales, although its share edged down from 45% in the previous quarter.　　China’s contribution also fell five percentage points to 14%. Despite the decline, management reiterated that China is still expected to account for around 20% of total net sales, according to the Yahoo Finance earnings call transcript.　　EUV, DUV Expansion Accelerates　　Meanwhile, ASML, per Reuters, also gave a more detailed outlook on its own expansion plan, noting that it is set to increase capacity for both its leading-edge EUV lithography systems and DUV tools by 30% in each of the next two years, as demand remains strong across advanced chips, mature nodes and the China market.　　In 2026, ASML expects to ship around 65 Low-NA EUV systems, putting its EUV business on track for roughly 45% growth, according to the Yahoo! Finance earnings call transcript. The company has also regained momentum in DUV immersion production, with shipments expected to reach around 130 systems this year, roughly matching last year’s level.　　Notably, ASML reached a significant milestone in High-NA EUV adoption, with Intel deploying the next-generation lithography system to produce part of its flagship Panther Lake laptop processors using the 18A process, according to its press release.

Key word：

ASM

Release time：2026-07-16 16:00 reading：252 Continue reading>>

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Samsung Reportedly Developing 4nm GAIA AI PC Chip; Mass Production Targeted as Early as 2027

　　Samsung is reportedly preparing to enter the AI PC chip market. According to Hankyung, industry sources say Samsung Electronics’ System LSI Business under the Device Solutions (DS) Division is developing GAIA, a 4nm AI accelerator for AI PCs. Prototype chips have reportedly already been provided to major customers, including Lenovo and HP, for performance validation, with mass production targeted as early as 2027.　　Samsung plans to pair GAIA with processing-in-memory (PIM), a next-generation DRAM technology that performs computations directly within memory, as the report indicates. Unlike traditional PC processors, GAIA is designed specifically for AI workloads, with an optimized NPU architecture aimed at efficiently handling generative AI tasks.　　The reported move follows Samsung’s earlier attempt to enter the PC chip market 14 years ago with an Exynos application processor that powered Samsung Chromebooks in 2012. However, it failed to break Intel’s dominance and withdrew from the business roughly two years later.　　AI PC Chip Competition Intensifies　　Samsung’s reported move positions it alongside a growing number of companies targeting the AI PC market. The report says the segment remains in its early stages and has yet to produce a dominant player as the AI agent era begins to emerge. Companies including NVIDIA, Qualcomm, Intel, and Huawei are already competing in the space. NVIDIA unveiled its next-generation RTX Spark AI PC chip in May, while Qualcomm first introduced the Snapdragon X Elite in 2023 before expanding its lineup with the entry-level Snapdragon C.　　EBN News says Samsung Electronics aims to differentiate itself by leveraging its leadership in memory alongside the AI chip design expertise gained from developing smartphone APs and mobile NPUs. Industry observers believe that combining AI accelerators with processing-in-memory (PIM) technology could enhance both AI processing performance and power efficiency.　　Industry observers cited by Hankyung say the success of Samsung’s AI PC chip initiative will depend largely on its ability to secure major customers and bring the product to market. If the company achieves mass production and builds a stable supply chain, the business could emerge as a key growth driver, helping the System LSI Business address its long-standing structural losses.　　Despite the growth opportunity, Samsung’s expansion into the AI accelerator market may also present strategic challenges. Hankyung notes that companies including NVIDIA and Qualcomm, which Samsung is expected to compete against in the AI PC market, are also among Samsung Foundry’s key customers.

Key word：

Samsung

Release time：2026-07-13 13:53 reading：317 Continue reading>>

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SK Group Chairman Joins ADR Listing Event; Samsung Reportedly Seeks Big Tech Foundry Orders at Sun Valley

　　SK Group Chairman Chey Tae-won is attending SK hynix’s American Depositary Receipt (ADR) listing ceremony on Nasdaq in New York on the morning of July 10 local time. According to ETNews, in addition to meeting with global investors, Chey is expected to hold discussions with major customers on expanding AI memory cooperation. The report also says he may meet with executives from leading tech companies, including NVIDIA and Tesla, during his U.S. visit.　　As the report notes, Chey’s attendance at the event is seen as an effort to showcase SK hynix’s AI memory competitiveness and long-term growth potential to global investors. The report adds that the ADR listing was intended to help the company achieve a valuation in global capital markets that better reflects its role as a key enabler of AI infrastructure expansion.　　The ADR offering is valued at approximately KRW 43 trillion and involves the issuance of up to 17.79 million new shares, representing about 2.5% of the company’s total outstanding shares. The report says the proceeds will be used to finance construction of the first fab at the Yongin semiconductor cluster, the Cheongju P&T7 advanced packaging fab, and the purchase of manufacturing equipment, including extreme ultraviolet (EUV) scanners.　　Samsung Courts Big Tech at Sun Valley　　Samsung executives are also in the U.S., where Samsung Electronics Chairman Jay Y. Lee has attended the Sun Valley Conference alongside Han Jin-man, President and Head of the Foundry Business. According to ZDNet, the move reflects Samsung’s push to secure AI semiconductor orders from major technology companies. Lee is accompanied this year by Han Jin-man, who was appointed head of Samsung’s foundry business late last year. The report says Han is expected to support discussions on securing foundry orders from major tech companies during the conference.　　Against this backdrop, attention has turned to potential foundry customers. According to The Korea Herald, one of the most closely watched meetings is with Apple executives, including CEO Tim Cook, incoming CEO John Turnus, and Senior Vice President of Services Eddy Cue. The report says Samsung Foundry, which secured an order for iPhone image sensor chips last August, is aiming to join Apple’s application processor (AP) supply chain, currently served by TSMC.　　Beyond Apple, The Korea Herald also notes that Amazon CEO Andy Jassy and OpenAI CEO Sam Altman are attending the conference. Both companies are developing in-house AI chips to compete with NVIDIA, already source High Bandwidth Memory (HBM) from Samsung Electronics, and are viewed as potential Samsung Foundry customers.

Key word：

SK Group

Release time：2026-07-10 10:56 reading：319 Continue reading>>

Trade news

Intel Patent Reveals XBM Matching HBM4 Footprint Without Interposers; Commercialization Seen After 2030

　　As AI chip demand surges, existing high-bandwidth memory (HBM) is facing supply and cost challenges, prompting the search for alternative memory technologies. According to Tom’s Hardware, an Intel patent application published on July 2, 2026 reveals the company’s proposed cross-batch memory (XBM) architecture, designed to ease the packaging and cost bottlenecks of today’s interposer-based HBM. The report states that the design aims to match HBM4’s footprint while replacing conventional DRAM and its ultra-wide interface with back-end-of-line (BEOL) transistors and serial Universal Chiplet Interconnect Express (UCIe) links.　　As noted by Wccftech, XBM is expected to target commercialization after 2030, in line with ZAM, the memory architecture Intel is co-developing with SoftBank subsidiary SAIMEMORY.　　XBM Architecture and Advantages　　The proposed architecture centers on DRAM blocks connected to a UCIe I/O block operating at 32 GT/s, with the I/O routed through the base die. According to Wccftech, each XBM stack provides a die capacity ranging from 0.5GB to 5GB. Each sub-channel consists of 12 data blocks, with up to 96 data blocks in an 8-high XBM stack and 192 in a 16-high stack. These channels operate at 2GHz. The report also notes that XBM can be implemented in multiple package configurations, including Memory-on-Package (MoP), enabling higher bandwidth and capacity in smaller form-factor designs.　　Notably, the memory die uses 1T1C (one transistor, one capacitor) back-end DRAM, with transistors fabricated in the back-end-of-line (BEOL) metal layers rather than front-end silicon, Wccftech says. According to the report, this significantly improves area efficiency, allowing more space for TSVs (Through-Silicon Via) and enabling higher memory density and bandwidth.　　Competitive and Ecosystem Challenges　　The global HBM market is currently dominated by South Korean suppliers. As Global Economic News points out, conventional HBM incurs high manufacturing costs due to the micro-bump processes used to vertically stack DRAM dies, while silicon interposers add significant routing complexity and cost. Intel’s proposed XBM architecture is designed to address these limitations.　　However, Global Economic News also notes that Intel’s proposal is unlikely to immediately shift the industry’s competitive landscape. SK hynix and Samsung Electronics have spent several years developing cost-saving technologies, including standard chiplets, UCIe, and fan-out packaging, to reduce interposer costs. The report further notes that platform compatibility and software ecosystems remain major barriers to adoption. The global AI accelerator ecosystem, led by NVIDIA, is currently optimized for the existing HBM architecture and wide-bandwidth parallel interfaces, making a transition to alternative memory architectures more challenging.

Key word：

Intel

Release time：2026-07-09 11:24 reading：345 Continue reading>>

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Samsung’s 2Q Operating Profit Soars 1,810% to Record KRW 89.4T, Reportedly Surpassing NVIDIA and Apple

　　Amid surging DRAM and NAND prices, Samsung’s newly released second-quarter earnings guidance once again exceeded market expectations. According to the the company, cited by Hankyung, preliminary second-quarter operating profit reached KRW 89.4 trillion (US$65.6 billion), up 1,810.3% year over year. According to News 1, this would translate into an operating profit margin of 52.3%.　　Hankyung notes that the result marks Samsung’s highest quarterly operating profit on record, extending its record-breaking earnings streak to three consecutive quarters. ZDNet further highlights that the figure surpasses the quarterly operating profits of U.S. tech giants NVIDIA and Apple.　　Samsung’s record-breaking performance marks the highest quarterly operating profit ever reported by a global IT company, according to ZDNet, surpassing NVIDIA’s previous record of US$53.5 billion (approximately KRW 81.9 trillion) posted in the first quarter of fiscal 2027 (ended April 2026).　　The scale of the earnings surge is further underscored by comparisons with Samsung’s past performance. The company posted operating profit of just KRW 4.7 trillion in the same period last year, while its projected 2Q26 operating profit alone surpassed Samsung’s cumulative operating profit over the entire three-year period from 2023 to 2025, according to Reuters.　　Meanwhile, the company’s preliminary second-quarter revenue came in at roughly KRW 171 trillion, up 129.3% from a year earlier, Hankyung notes.　　Memory Prices Fuel Samsung’s Record Quarter　　The strong results were primarily driven by Samsung’s booming memory semiconductor business within its Device Solutions (DS) division, with industry observers noting that the company has been a major beneficiary of surging memory prices.　　According to ZDNet, average selling prices (ASPs) reportedly climbed more than 50% quarter over quarter for DRAM and over 60% for NAND. A separate ZDNet report also points out that the momentum is expected to continue, as Samsung Electronics is negotiating aggressively with customers to raise its third-quarter DRAM ASP by as much as 20% from the previous quarter.　　This strong performance aligns with TrendForce’s latest memory pricing survey, which indicates that the DRAM market will remain extremely tight in the third quarter of 2026, with contract DRAM prices expected to rise another 13–18%.　　However, Reuters also notes that despite another strong quarter expected from its memory business, losses in Samsung’s foundry and System LSI operations are likely to deepen, as employee bonus expenses continue to be allocated across the broader semiconductor division.

Key word：

Samsung

Release time：2026-07-08 13:16 reading：405 Continue reading>>

Trade news

Huawei Expands Tau Scaling Law V2 Paper, Highlighting LogicFolding Path to Ascend AI Chips in 2030

　　Two months after Huawei introduced the Tau (τ) Scaling Law in May, the company on July 3 disclosed additional details on an updated version, including further implementation insights and performance-related data. Notably, the V2 version of Time Scaling Theory for Multi-Level Electronic Systems (Tau Law) also outlines a roadmap extending LogicFolding beyond mobile SoCs into AI accelerators, including Huawei’s Ascend 990 expected around 2030.　　Kirin 2026 Delivers Density Gain　　In the near term, Kirin 2026 serves as the first validation platform for the dual-layer LogicFolding architecture. Chinese media outlets Guacha and mrjjxw.com, citing the paper published on ChinaXiv platform under the Chinese Academy of Sciences, report that compared with the 2025 Kirin 9030 Pro baseline, the Kirin 2026 achieves a transistor density increase from 155 MTr/mm² to 238 MTr/mm², representing a gain of approximately 53.5%.　　The paper, cited by Guacha, also notes that achieving a similar gain through conventional geometric scaling would typically require about three years. As reported by Stdaily, Huawei’s first smartphone powered by the Kirin 2026 processor is expected to debut this fall, marking the first real-world test of the technology in the market.　　According to Huawei, LogicFolding is a methodology that partitions digital, analog, and memory circuits across vertically stacked active tiers. On a mobile SoC, LogicFolding delivers a 55% stepwise increase in transistor density and a 41% reduction in power consumption at equivalent performance at a fixed device node, the company notes.　　(Credit: Huawei)　　Guacha further cites the V2 version of Time Scaling Theory for Multi-Level Electronic Systems (Tau Law), which projects logic folding will evolve from localized critical-path optimization to full multi-layer architectures over the next decade, with each package integrating three or more active layers.　　The shift, according to the report, is driven by low-temperature hybrid bonding, which relaxes inter-layer thermal constraints, and TSV landing point migration from upper metals to M6, freeing over 30% of routing resources. Under this trajectory, transistor density is projected to scale toward 400 MTr/mm² and beyond between 2026 and 2035, the report suggests.　　Next Phase: LogicFolding in Ascend AI Chips　　Notably, the V2 version of Time Scaling Theory for Multi-Level Electronic Systems identifies Huawei’s Ascend AI chips as the next application of LogicFolding. According to Guacha, while the technology could enable Kirin processors to boost CPU clock speeds toward 4GHz and beyond, it is also expected to extend to the Ascend 990 AI accelerator around 2030. The report further notes that 3D folding is expected to become the primary carrier of the α architecture through 2035.　　According to Huawei, in AI system designs, a co-designed stack—combining memory-semantic Unified Bus fabric, near-package Hi-ONE optical I/O, and edge-to-surface 3D folding—is projected to deliver more than 100× growth in hardware integration by 2035.

Key word：

Huawei

Release time：2026-07-07 11:18 reading：411 Continue reading>>

Trade news

Kioxia Begins BiCS 10 NAND Sampling, Reportedly Targets 2027 Mass Production at Kitakami Fab

　　Shortly after signaling summer sampling plans for its next-generation NAND, Kioxia on July 3 announced it has begun sample shipments of 1Tb (terabit) TLC (Triple-Level Cell) memory devices based on its 10th-generation BiCS FLASH 3D NAND technology. According to the company, the products will be manufactured at its Kitakami Plant Fab 2 in Iwate Prefecture, Japan.　　According to Nikkei, Kioxia plans to begin BiCS 10 NAND mass production in 2027. Performance has been significantly upgraded, with data transfer speeds reaching 4.8 gigabits per second—about 30% faster than the previous generation. Memory density has increased by 60%, while read power efficiency has improved by roughly 30%, Nikkei reports.　　Notably, The Japan Times reports that the new product, designed for solid-state drives (SSDs), is central to Kioxia’s strategy to capitalize on surging AI data center storage demand while reducing its reliance on smartphone-focused products, including those supplied to Apple.　　BiCS 10 Key Highlights: 332-Layer, CBA Technology　　As reported by EE Times Japan, a key highlight of Kioxia’s 10th-generation BiCS FLASH is the strategic choice of a 332-layer architecture. Traditionally, the NAND industry has improved bit density and reduced costs by pushing toward higher layer counts, and competitors of Kioxia are also advancing development of products exceeding 400 layers, the report notes.　　However, citing management, the report notes that excessive scaling of layer counts can create new challenges. According to Atsushi Inoue, General Manager of the Memory Business Division at Kioxia, at very high stack levels—such as above 400 layers—power consumption tends to increase as more memory layers are activated during read and write operations. In addition, further stacking may require thinner cell layers, which can reduce charge retention and raise concerns over long-term reliability.　　Notably, Kioxia’s 332-layer NAND structure, according to EE Times Japan, can reduce cost per gigabyte by around 10% versus 400-plus-layer designs, while also delivering roughly 10% better power efficiency and about 35% higher memory cell reliability.　　Another key feature of Kioxia 10th-generation BiCS FLASH is the continued use of CBA (CMOS directly Bonded to Array) technology, EE Times Japan suggests. Kioxia first introduced CBA in the 8th generation, which reportedly allowed the company to achieve interface speeds of 3.6Gb/s. According to Inoue, both the 9th and 10th generations now deliver 4.8Gb/s interface performance, extending Kioxia’s lead over rivals by roughly one year.　　Rivals Speed up NAND Moves　　Notably, Kioxia’s progress comes as its South Korean rivals accelerate aggressive NAND capacity moves. On July 2, SK hynix announced plans to invest a total of 100 trillion won in Cheongju, with 80 trillion won allocated to its M17 NAND production facility, according to Chosun Biz.　　CEO Kwak Noh-jung said NAND demand is rising rapidly while supply remains constrained, adding that Cheongju provides the fastest and most efficient base for SK hynix to build a new NAND fab, the report notes. According to SK hynix, construction of M17 is scheduled to begin next year, with operations targeted to commence in the first half of 2029.　　Meanwhile, an April report from The Bell also suggested that Samsung plans to establish a new NAND production line at its Pyeongtaek Campus Plant 5 (P5), where the cleanroom is scheduled to be completed next year. If confirmed, this would mark the company’s first major NAND capacity expansion since P3, the report added.

Key word：

Kioxia

Release time：2026-07-06 13:07 reading：353 Continue reading>>

Trade news

SK hynix Unveils KRW 100T Cheongju Investment, Including KRW 80T NAND Fab Set for 1H29 Operations

　　SK hynix has unveiled a major new investment plan. According to ZDNet, President and CEO Kwak Noh-Jung announced at the National Briefing on the Vision for Advanced Industry Development in the Chungcheong Region on July 2 that the company will invest KRW 100 trillion in Cheongju. The plan allocates KRW 80 trillion to the M17 NAND fabrication plant and KRW 20 trillion to P&T7, SK hynix’s advanced packaging facility.　　Construction of the new M17 fab is set to begin in 2027, with operations targeted to commence in the first half of 2029, according to Kwak. P&T7, meanwhile, is scheduled for completion by the end of 2027 and will serve as SK hynix’s advanced packaging hub, the report adds.　　Kwak said the growing adoption of agentic AI and physical AI is broadening NAND flash applications, making further capacity expansion necessary, the report notes.　　The report further notes that SK Group plans to build a 1-gigawatt (GW) AI data center in the Chungcheong region to create synergies between semiconductor manufacturing and AI computing. The group had previously announced plans to establish 15 GW of AI data center capacity across South Korea.　　Samsung Unveils KRW 140 Trillion Investment Plan　　Meanwhile, Samsung also announced KRW 140 trillion in investments at the same event, Newsis reports. The investment plan includes KRW 67 trillion to expand Samsung Display’s advanced OLED production lines in Asan, KRW 56 trillion for Samsung Electronics’ HBM fabs in Onyang and Cheonan, KRW 9 trillion for Samsung SDI to build a next-generation battery mother line in Cheonan, and KRW 8 trillion for Samsung Electro-Mechanics to establish high-performance AI server package substrate production in Sejong.

Key word：

SK hynix

Release time：2026-07-03 16:03 reading：392 Continue reading>>

Trade news

Samsung Reportedly Restarts 1.4nm Push, Targets 2029 Mass Production to Close Gap with TSMC, Intel

　　As Intel and TSMC both target 1.4nm mass production around 2028-29, Samsung—after reportedly delaying its own roadmap—is now re-entering the race. According to The Bell, the company has resumed efforts to commercialize its 1.4nm (SF1.4) foundry process, with mass production now slated for 2029, placing it slightly behind its leading rivals.　　Samsung is also understood to have recently requested early development of process equipment from domestic and overseas partners. As noted by the report, it has recently shared its 1.4nm process roadmap with major semiconductor equipment makers, including Applied Materials and Lam Research.　　Notably, the report, citing industry sources, points out that Samsung Electronics has already installed ASML’s next-generation High-NA extreme ultraviolet (EUV) lithography equipment at its NRD-K facility. The High-NA EUV tools are understood to be applied to select layers starting from the 1.4nm process, the report explains.　　Why Samsung Delayed 1.4nm Plans　　The Bell adds that the original 2027 target has been pushed back to 2029, as Samsung redirects focus toward strengthening its 2nm (SF2) and derivative SF2P processes, signaling a shift toward yield stabilization and process optimization over aggressive node advancement.　　This strategic pivot is also reflected at the product level. A previous Global Economic News report suggested that Samsung has shifted the manufacturing process for its next-generation flagship smartphone processor, the Exynos 2800, from the originally planned 1.4nm node to an advanced version of its 2nm process.　　A Closer Look at 1.4nm Plans for Intel, TSMC　　Samsung Electronics’ renewed push into its 1.4nm process is drawing attention over whether it can narrow the technology gap with rivals such as TSMC and Intel. According to Economic Daily News, TSMC is targeting 1.4nm pilot production as early as 3Q27, with mass production planned for 2H28.　　However, Tom’s Hardware notes that TSMC is expected to skip ASML’s High-NA EUV tools through 2029, meaning its 1.4nm node would proceed without the advanced system being adopted by Intel and Samsung.　　For Intel, Reuters reports that its 18A-P process has already entered pilot production, with the company reportedly targeting 14A risk production in 2028, followed by high-volume manufacturing in 2029.

Key word：

Samsung

Release time：2026-07-01 11:39 reading：514 Continue reading>>

model	brand	Quote
TL431ACLPR	Texas Instruments
CDZVT2R20B	ROHM Semiconductor
MC33074DR2G	onsemi
RB751G-40T2R	ROHM Semiconductor
BD71847AMWV-E2	ROHM Semiconductor

model	brand	To snap up
STM32F429IGT6	STMicroelectronics
BU33JA2MNVX-CTL	ROHM Semiconductor
ESR03EZPJ151	ROHM Semiconductor
IPZ40N04S5L4R8ATMA1	Infineon Technologies
BP3621	ROHM Semiconductor
TPS63050YFFR	Texas Instruments

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